CODE 66270 ACADEMIC YEAR 2020/2021 CREDITS 6 cfu anno 1 INGEGNERIA INFORMATICA 8719 (L-8) - GENOVA SCIENTIFIC DISCIPLINARY SECTOR ING-INF/05 LANGUAGE Italian TEACHING LOCATION GENOVA SEMESTER 1° Semester MODULES Questo insegnamento è un modulo di: ELECTRONIC COMPUTERS TEACHING MATERIALS AULAWEB OVERVIEW The course aims at providing the basic concepts of binary logic and arithmetic for the analysis and design of digital systems. AIMS AND CONTENT LEARNING OUTCOMES The course introduces the methodologies for the study and design of digital systems. Contents: Boolean algebra, description, synthesis and optimization of combinational networks, design of finite state machines asynchronous and synchronous, analysis and synthesis of complex subsystems (counters, adders, arithmetic units, memories, ..). The digital systems will be descibed using the VHDL language. AIMS AND LEARNING OUTCOMES At the end of the course the student will be able to understand, analyze, and design (at a functional level) simple digital systems based on Finite State Machines. PREREQUISITES None. TEACHING METHODS The course alternates between lectures and lab sessions. SYLLABUS/CONTENT 1. Boolean algebra and combinational logic - Classic approach that does not require preliminary knowledge. 2. Combinational Network Design - Synthesis and minimization with Karnaugh maps. - Standard combinational logic. - Propagation delays. 3. Numeral Systems and Binary Arithmetic - Classic approach. - Arithmetic networks. 4. Introduction to Sequential Networks - Intuitive transition from combinational to sequential logic. - Structure and operation of principal flip-flop types. - Dynamic flip-flop characteristics. 5. Flip-flop Based Synchronous Networks - Introduction to synchronous flip-flop networks. - Sequential networks: registers and counters. - Techniques for timing analysis of synchronous networks. 6. Sequential Networks as Finite State Machines - FSM pro ject, realized through ASM diagrams. - Solved exercises of ASM diagrams. - FSM synthesis with state tables and maps. 7. The Finite State Machine as System Controller - Design of Controller-Datapath systems. - Solved exercises on Controller-Datapath systems. RECOMMENDED READING/BIBLIOGRAPHY Donzellini, G. and Oneto, L. and Ponta, D. and Anguita. D., Springer, Introduzione al Progetto di Sistemi Digitali, 2018. Donzellini, G. and Oneto, L. and Ponta, D. and Anguita. D., Springer, Introduction to Digital Systems Design, 2019. TEACHERS AND EXAM BOARD DAVIDE ANGUITA Ricevimento: By appointment. LUCA ONETO Ricevimento: The meetings must be scheduled by email with the teacher. Exam Board DAVIDE ANGUITA (President) MASSIMO MARESCA PIERPAOLO BAGLIETTO (President Substitute) LUCA ONETO (President Substitute) LESSONS Class schedule DIGITAL DESIGN EXAMS EXAM DESCRIPTION The exam consists of a written test and an optional oral exam. There is no minimum threshold on the written test for partecipating to the oral exam. After the winter session the written test is replaced by an oral exam. The final evaluation can be integrated, optionally, by intermediate evaluations obtained by conducting written tests offered during the course or through lab reports. ASSESSMENT METHODS The purpose of the written exam is to verify the ability of the student to design simple digital systems and the oral exam has the purpose to verify both the knowledge level and the ability to exploit the instruments for the design and the analysis of combinatorial and sequential networks. Exam schedule Data appello Orario Luogo Degree type Note 07/01/2021 08:00 GENOVA Esame su appuntamento 07/01/2021 08:00 GENOVA Orale 04/02/2021 08:00 GENOVA Esame su appuntamento 04/02/2021 08:00 GENOVA Orale 31/05/2021 08:00 GENOVA Esame su appuntamento 31/05/2021 08:00 GENOVA Orale 17/06/2021 08:00 GENOVA Esame su appuntamento 17/06/2021 08:00 GENOVA Orale 14/07/2021 08:00 GENOVA Esame su appuntamento 14/07/2021 08:00 GENOVA Orale 01/09/2021 08:00 GENOVA Esame su appuntamento 01/09/2021 08:00 GENOVA Orale