OVERVIEW

Computers have led to a third revolution for civilization, with the information revolution taking its place alongside the agricultural and industrial revolutions. Had the transportation industry kept pace with the computer industry, for example, today we could travel from New York to London in a second for a penny. Successful programmers have always been concerned about the performance of their programs, because getting results to the user quickly is critical in creating popular software.

This result can only be achieved by understanding the main architectural concepts implemented in the computers used for their execution. This course aims to present the ideas and technologies underlying modern multicore computers.

Since the course is given in Italian, please have a look at the Italian version of this page for further information.

AIMS AND CONTENT

LEARNING OUTCOMES

The purpose of the teaching unit is for participants to acquire knowledge and understand the fundamental principles underlying the organization and structure of computers, with reference to languages (assembly and machine), number representation and arithmetic, combinational and sequential circuits, the processor and memory hierarchies, as well as the basic concepts necessary to write efficient code, such as vectorization and multithreading.

PREREQUISITES

No specific prerequisites are required.

TEACHING METHODS

Hybrid: in addition to the scheduled lectures and lab sessions, lab exercises are assigned to be completed independently via Aulaweb, with the aim of integrating theoretical study with practical applications.

Students who hold valid certificates relating to Specific Learning Difficulties (SLD), disabilities or other educational needs are invited to contact the lecturer and the school’s disability liaison officer at the start of the course to agree on any teaching arrangements which, whilst respecting the course objectives, take into account individual learning styles. 

The contact details for the university’s disability liaison officer are available at the following link: https://unige.it/commissioni/comitatoperlinclusionedeglistudenticondisabilita.

RECOMMENDED READING/BIBLIOGRAPHY

The instructor will indicate and/or make available, via Aulaweb, lecture notes, manuals, and simulation software.

TEACHERS AND EXAM BOARD

LESSONS

LESSONS START

According to the calendar approved by the Degree Program Board: https://easyacademy.unige.it/portalestudenti/index.php?view=easycourse&_lang=it&include=corso

Class schedule

The timetable for this course is available here: Portale EasyAcademy

EXAMS

EXAM DESCRIPTION

The exam consists of a mandatory written test and an optional oral test.

The written test is based on open-ended questions and exercises. Depending on the number of registered candidates, the written test may be preceded by a quiz to admit only those who achieve a sufficient score to the written test.

During the written test, no documentation may be consulted EXCEPT for one or more sheets containing the RISC-V assembler instructions. The test is passed with an overall score of at least 18 points. Points obtained from exercises carried out during the year, described below, will be added to this result.

The student can decide to accept the grade or take the oral test.

The oral test can be either a single-question or a traditional format. With the single-question format, it is possible to achieve a score in the range [+2, -1], to be added to the previous grade.

During the year, optional laboratory exercises will be assigned, which will be corrected and evaluated as additional points to those obtained in the written test. These exercises are mainly aimed at self-assessing the students' knowledge and skills regarding the most important topics covered during the course.

ASSESSMENT METHODS

The written exam will assess the student's ability to:

• illustrate the main theoretical concepts;
• identify and briefly describe the most important components of the RISC-V architecture;
• translate short programs from C to RISC-V assembler;
• describe and design basic combinational and sequential circuits;
• solve calculation exercises and understand multithreading code.

The optional oral exam will evaluate the student's theoretical knowledge on the course topics.

FURTHER INFORMATION

For further information, please refer to the course’s AulaWeb module or contact the instructor.

Students with valid certifications for Specific Learning Disorders (SLD) may request accommodations for exams at least 7 days prior to the exam date by filling out the “accommodation request form” (available via online services at https://modulionline.unige.it/richiesta-adattamenti# no-back), which will be automatically forwarded by the system to the instructor in charge of the course and to the faculty liaison for students with disabilities and SLDs in their School/Department. 

The student will receive a copy of their request.