Information updated until 30/06/2026 CODE 111453 ACADEMIC YEAR 2026/2027 CREDITS 6 cfu anno 1 INFORMATICA 11896 (L-31 R) - GENOVA SCIENTIFIC DISCIPLINARY SECTOR INFO-01/A TEACHING LOCATION GENOVA SEMESTER 1° Semester MODULES Questo insegnamento è un modulo di: COMPUTER ARCHITECTURE AND ORGANIZATION TEACHING MATERIALS AULAWEB AIMS AND CONTENT LEARNING OUTCOMES The module aims to provide students with a general understanding of the fundamental principles underlying the organization and structure of computers, with reference to languages (assembly and machine), number representation and arithmetic, as well as combinational and sequential circuits. AIMS AND LEARNING OUTCOMES The student will acquire the necessary skills to understand how information is stored in the computer and how high-level programs are translated into the computer's own language. The choice of reference architecture is a key aspect. The RISC-V architecture was chosen because it offers a simple, elegant, modern, open source model that is also of growing interest in the non-academic sphere. In particular, you will be able to describe the components of the Von Neumann architecture; encode and decode numbers with and without sign, integers, fractional, floating point; translate simple programs from C to RISC-V assembler; recognise and describe the main combinational circuits. In addition, students will acquire basic learning-to-learn, personal and social skills through group teaching, cases/problems. PREREQUISITES No specific prerequisites are required. TEACHING METHODS Lectures, classroom exercises, ongoing assignment with delivery and evaluation. Instant polling will be used for self-assessment and didactics for groups and cases/problems. SYLLABUS/CONTENT Introduction: from high-level language to hardware The components of a computer: the von Neumann architecture Information representation Bit, byte, single and double word Representation of integers with and without sign in bases other than decimal Representation of non-numeric information (e.g., characters and images) Binary arithmetic of computers and floating-point numbers according to the IEEE 754 standard RISC-V ISA The main instructions Operands and addresses Translation and execution of a program (assembler, linker, loader) Combinational circuits Logic gates, truth table, and Boolean expressions Arithmetic logic unit Clock RECOMMENDED READING/BIBLIOGRAPHY David A Patterson John L Hennessy Struttura e progetto dei calcolatori Progettare con RISC-V Seconda edizione italiana ISBN: 9788808199669 TEACHERS AND EXAM BOARD DANIELE D'AGOSTINO Ricevimento: By appointment, in presence or via TEAMS. GIORGIO DELZANNO Ricevimento: Appointment by email LESSONS LESSONS START According to the calendar approved by the Degree Program Board: https://corsi.unige.it/en/corsi/11896/studenti-orario Class schedule The timetable for this course is available here: Portale EasyAcademy EXAMS EXAM DESCRIPTION Guidelines for students with certified Specific Learning Disorders, disabilities, or other special educational needs are available at https://corsi.unige.it/en/corsi/11896/studenti-disabilita-dsa. FURTHER INFORMATION For further information, please refer to the course’s AulaWeb module or contact the instructor. Agenda 2030 - Sustainable Development Goals Quality education Industry, innovation and infrastructure