OVERVIEW

The course aims at providing the basic concepts of binary logic and arithmetic for the analysis and design of digital systems.

AIMS AND CONTENT

LEARNING OUTCOMES

The teaching unit aims to provide students with a general understanding of the notions and methodologies for the analysis and design of digital systems, covering the main aspects from combinational and sequential logic to finite-state machines, and enabling the design and simulation of simple digital systems containing standard logic and finite-state machines.

AIMS AND LEARNING OUTCOMES

At the end of the course the student will be able to understand, analyze, and design (at a functional level) simple digital systems based on Finite State Machines.

During the course the following skills will be developed
- personal competence
- social competence
- ability to learn to learn

PREREQUISITES

None.

TEACHING METHODS

- Frontal lesson (approx. 70% to develop ability to learn to learn)
- Laboratories in pairs (approx. 30% to develop personal competence and social competence)

Students who hold valid certificates relating to Specific Learning Difficulties (SLD), disabilities or other educational needs are invited to contact the lecturer and the school’s disability liaison officer at the start of the course to agree on any teaching arrangements which, whilst respecting the course objectives, take into account individual learning styles.

The contact details for the university’s disability liaison officer are available at the following link: https://unige.it/commissioni/comitatoperlinclusionedeglistudenticondisabilita.

SYLLABUS/CONTENT

1. Boolean algebra and combinational logic
- Classic approach that does not require preliminary knowledge.
2. Combinational Network Design
- Synthesis and minimization with Karnaugh maps.
- Standard combinational logic.
- Propagation delays.
3. Numeral Systems and Binary Arithmetic
- Classic approach.
- Arithmetic networks.
4. Introduction to Sequential Networks
- Intuitive transition from combinational to sequential logic.
- Structure and operation of principal flip-flop types.
- Dynamic flip-flop characteristics.
5. Flip-flop Based Synchronous Networks
- Introduction to synchronous flip-flop networks.
- Sequential networks: registers and counters.
- Techniques for timing analysis of synchronous networks.
6. Sequential Networks as Finite State Machines
- FSM pro ject, realized through ASM diagrams.
- Solved exercises of ASM diagrams.
- FSM synthesis with state tables and maps.
7. The Finite State Machine as System Controller
- Design of Controller-Datapath systems.
- Solved exercises on Controller-Datapath systems.

RECOMMENDED READING/BIBLIOGRAPHY

Donzellini, G. and Oneto, L. and Ponta, D. and Anguita. D., Springer, Introduzione al Progetto di Sistemi Digitali, 2018.
Donzellini, G. and Oneto, L. and Ponta, D. and Anguita. D., Springer, Introduction to Digital Systems Design, 2019.

TEACHERS AND EXAM BOARD

Exam Board

DAVIDE ANGUITA (President)

PIERPAOLO BAGLIETTO

LUCA ONETO (President Substitute)

LESSONS

LESSONS START

https://easyacademy.unige.it/portalestudenti/index.php?view=easycourse&_lang=it&include=corso​

Class schedule

The timetable for this course is available here: Portale EasyAcademy

EXAMS

EXAM DESCRIPTION

Written exam plus oral discussion.

ASSESSMENT METHODS

The purpose of the written exam is to verify the ability of the student to design simple digital systems and the oral exam has the purpose to verify both the knowledge level and the ability to exploit the instruments for the design and the analysis of combinatorial and sequential networks.

FURTHER INFORMATION

Students with valid certifications for Specific Learning Disorders (SLD) may request accommodations for exams at least 7 days prior to the exam date by filling out the “accommodation request form” (available via online services at https://modulionline.unige.it/richiesta-adattamenti# no-back), which will be automatically forwarded by the system to the instructor in charge of the course and to the faculty liaison for students with disabilities and SLDs in their School/Department.

The student will receive a copy of their request.