CODE 94785 ACADEMIC YEAR 2023/2024 CREDITS 5 cfu anno 1 INGEGNERIA MECCANICA - PROGETTAZIONE E PRODUZIONE 9269 (LM-33) - LA SPEZIA SCIENTIFIC DISCIPLINARY SECTOR ING-INF/01 LANGUAGE Italian TEACHING LOCATION LA SPEZIA SEMESTER 1° Semester MODULES Questo insegnamento è un modulo di: ARCHITECTURES FOR EMBEDDED SYSTEMS TEACHING MATERIALS AULAWEB AIMS AND CONTENT LEARNING OUTCOMES The student learns the architecture of an Embedded System, with a focus on integration and interfacing strategies of microcontrollers with sensors, fields bus, IoT devices, and dedicated electronic devices in general. Another objective is to get acquainted with the analysis procedures of the critical aspects in both the design of E.S. (power, size, cost, performance, adaptiveness) and related firmware, including bus and standards for higher-level interoperation. Learning targets will also be pursued by practical demonstrations during lessons with inexpensive devices and advanced sensing devices. AIMS AND LEARNING OUTCOMES Capability to design and program electronic systems based on microcontrollers Technical skills about the HW configuration of IoT systems The learning outcomes will be verified through a battery of tests, issued in both closed and open form, which will enable to verify the correct acquisition of the knowledge and technical competences covering the whole class program. TEACHING METHODS Lessons in class by the Teacher SYLLABUS/CONTENT A) General aspects on Embedded Systems (E.S.) - what is an E.S. and what it's meant for - Definition of E.S. - Features and aims: what are the differences between E.S. and conventional computer systems - why do E.S. exist - Applications of E.S. B) Architectures of E.S. (How an E.S. is organized and how it operates) - Electronis devices (typical constituting devices in E.S.) - Architecture (how E.S. are organized from a logical/circuit perspective) - Real-time performance (definition and issues in real-time E.S.) C) Design of E.S. (How an E.S. is made) - Computational dimension (speed and computational power) - Power dimension (power consumption, power sources, regulation) - Sensor dimension (sensor interfacing, sensor families, analog/digital technologies) - Actuator dimension (interfacing to motors and actuators) - Communication dimension (high/low data exchange - bus) D) E.S. in Mechatronics (How an E.S. integrates in a mechatronic system) - Typical interfacing technologies (CAN bus, ProfiBus / ProfiNet) - Realization features (energy, EM, power, speed, real-time performance) This teaching deals with topics of scientific-technology interest, including the progress of electronics and embedded systems in the support of Society and People, and contributes to the achievement of the following Objectives of the UN SDGs 2030: Goal 3. Good health and well-being (embedded systems play a crucial role in the area of health and personal care) Goal 4. Quality education (the dissemination of technology skills raises the overall cultural level of modern Society) Goal 5. Gender equality (this Course promotes a general, uniform dissemination of technological competences, in the firm belief that electronic subjects can/should have a pervasive nature irrespectively of age, gender and any other discriminating factor) TEACHERS AND EXAM BOARD RODOLFO ZUNINO Ricevimento: By appointment after direct contact with the Teacher rodolfo.zunino@unige.it Exam Board GIOVANNI ADORNI (President) ERMANNO FABIO DI ZITTI PAOLO GASTALDO DANIELE GROSSO RODOLFO ZUNINO (President Substitute) LESSONS LESSONS START https://corsi.unige.it/9269/p/studenti-orario Class schedule The timetable for this course is available here: Portale EasyAcademy EXAMS ASSESSMENT METHODS Tests and open questions allow to verify the successful acquisition of both technical competence and design capabilities; at the same time, the exam confirms the proper acquisition of a correct awareness about the various scopes that characterize the analysis and HW design of Embedded Electronic Systems. The validation of competences is certified in a progressive fashion through a selective evaluation of exam replies: - a group of baseline questions aims to verify the minimal contents required to pass the exam (18-22) - a group of reference tests aims to validate the expected average of competence and notions (23-28) - a group of challenging questions highlights the acquisition of original and high-level skills (29-30Lode) Exam schedule Data appello Orario Luogo Degree type Note 09/01/2024 09:00 LA SPEZIA Orale 13/02/2024 09:00 LA SPEZIA Orale 20/06/2024 09:00 LA SPEZIA Orale 26/07/2024 09:00 LA SPEZIA Esame su appuntamento